In accordance with recent development of compact and high level function electronic equipment, a semiconductor device including a semiconductor integrated circuit unit is also required of compactness, high packaging density and high speed in packaging work. For example, as memory packages, an LOC (lead on chip), a SON (small outline non-lead), a .mu.BGA (micro-ball grid array) using a TAB tape (disclosed in National Publication of translated version No. 06-504408) and the like have been developed.
Now, a conventional semiconductor device designated as .mu.BGA and a method for manufacturing the device will be described with reference to drawings.
FIG. 10 is a sectional view of the conventional semiconductor device designated as .mu.BGA. In FIG. 10, a reference numeral 101 denotes a semiconductor chip including semiconductor elements, a reference numeral 102 denotes a wiring circuit sheet of flexible sheet formed on the semiconductor chip 101, a reference numeral 103 denotes a flexible low elasticity material disposed between the semiconductor chip 101 and the wiring circuit sheet 102, a reference numeral 104 denotes a partial lead corresponding to a part of a wiring layer, a reference numeral 105 denotes an element electrode electrically connected with the semiconductor element included in the semiconductor chip 101, and a reference numeral 106 denotes an electrode formed on the surface of the wiring circuit sheet 102 for attaining electric connection with an external device.
As is shown in FIG. 10, in the conventional semiconductor device designated as .mu.BGA, the wiring circuit sheet 102 is formed on the semiconductor chip 101 with the low elasticity material 103 sandwiched therebetween, and the element electrode 105 on the semiconductor chip 101 is electrically connected with the electrode 106 on the wiring circuit sheet 102 through the partial lead 104.
Next, the method for manufacturing the aforementioned conventional semiconductor device will be described with reference to the same drawing.
First, the wiring circuit sheet 102 in the shape of flexible sheet is adhered onto the semiconductor chip 101 with the low elasticity material 103 sandwiched therebetween. The wiring circuit sheet 102 includes a wiring pattern therein, the electrode 106 to be connected with the wiring pattern is formed on the wiring circuit sheet 102, and the partial lead 104 extends from the electrode 106. In this case, the low elasticity material 103 is an insulating material having an adhesive function.
Next, the partial lead 104 and the element electrode 105 are electrically connected with each other by using a conventional thermo compression bonding technique generally used in "TAB" (tape automated bonding) or an ultrasonic bonding technique. In this manner, the semiconductor device is manufactured.
Specifically, owing to the aforementioned structure of the semiconductor device, the semiconductor device can be electrically connected with external equipment through a large number of electrodes 106 two-dimensionally formed on the wiring circuit sheet 102, while suppressing stress. Accordingly, information communication equipment, office electronic equipment and the like can be downsized.